Some applications of an IC may use certain IC pins, i.e. points of electrical contact for signal exchange between the IC device and an external device, while other applications of the same IC may not need these same IC pins. The subject matter of the present application concerns circuitry in an IC coupled to IC pins potentially not used in some contemplated applications of the IC device.
IC pins (such as IC pins for a high impedance logic signal input function) which are not connected to an external logic signal may tend to oscillate or cause excessive power consumption if not pulled to a stable logic signal state that is undriven or floating logic signal inputs are prone to oscillate or cause high current consumption especially in CMOS input buffers. Such oscillation or current consumption consumes unnecessary power and potentially disrupts other IC circuit signal processing.
A traditional solution to oscillation of floating logic input IC pins incorporates a "pull-up" or "pull-down" resistor coupled between the input IC pin and a positive or ground, respectively, potential. The level-pulling device, e.g., a pull-up or pull-down resistor, pulls the input IC pin to a given logic state to repress oscillation. When the input IC pin is not used. i.e.. the IC device is used in an application not requiring that particular IC pin, no oscillation occurs. If a particular IC pin is used, (i.e., coupled to an external device in a given application), an input signal at the IC pin must overcome the level-pulling device when driving the IC pin to a state opposite that established by the level-pulling device.
In extremely low power consumption applications, use of such level-pulling devices represents undesirable power consumption. Current drawn by the level-pulling device can be significant in extremely low power consumption applications. Accordingly, a level-pulling function should be established only when needed, and disabled at other times.
A high resistance field effect transistor (FET) having a small, long channel serves as "gatable" pull-down or pull-up resistor. A configuration device, such as a mask or data register, drives the gate of the FET to selectively establish or disable the level-pulling function of the FET. Use of the input IC pin must, however, be known at the time of manufacture, for the case of a mask-driven configuration device, or at the time of configuration, for the case of a data register-driven configuration device. If, following configuration in level-pulling mode, an input signal is applied to the input IC pin, the IC pin is undesirably in a level-pulling mode and excess power is devoted to overcoming the level-pulling device.
It would be desirable to establish a level-pulling function when needed and disable the level-pulling function when not needed without requiring establishment or disablement of the function at the time of manufacture or initial integrated circuit configuration or operation.